iPhoneAlle anzeigen
iPhone 11iPhone 11 ProiPhone 11 Pro MaxiPhone 12iPhone 12 ProiPhone 12 Pro MaxiPhone 12 miniiPhone 13iPhone 13 ProiPhone 13 Pro MaxiPhone 13 miniiPhone 14iPhone 14 PlusiPhone 14 ProiPhone 14 Pro MaxiPhone 15iPhone 15 PlusiPhone 15 ProiPhone 15 Pro MaxiPhone 16iPhone 16 PlusiPhone 16 ProiPhone 16 Pro MaxiPhone 16eiPhone 8iPhone 8 PlusiPhone SE 2020iPhone SE 2022iPhone XiPhone XRiPhone XSiPhone XS Max
Galaxy A-SerieAlle anzeigen
Galaxy A12Galaxy A13Galaxy A13 5GGalaxy A14Galaxy A15Galaxy A16Galaxy A17Galaxy A17 5GGalaxy A20eGalaxy A21Galaxy A22Galaxy A23Galaxy A24Galaxy A25Galaxy A26 5GGalaxy A32Galaxy A33Galaxy A34Galaxy A35Galaxy A36 5GGalaxy A37Galaxy A40Galaxy A41Galaxy A42Galaxy A50Galaxy A51Galaxy A52Galaxy A53Galaxy A54Galaxy A55Galaxy A56 5GGalaxy A57 5GGalaxy A70Galaxy A71Galaxy A72
Redmi SeriesAlle anzeigen
Redmi 10Redmi 13CRedmi 15 5GRedmi Note 10Redmi Note 10 ProRedmi Note 11Redmi Note 11 ProRedmi Note 11 Pro Plus 5GRedmi Note 11sRedmi Note 12Redmi Note 12 5GRedmi Note 12 ProRedmi Note 12 Pro 5GRedmi Note 12 Pro PlusRedmi Note 13Redmi Note 13 5GRedmi Note 13 ProRedmi Note 13 Pro PlusRedmi Note 14Redmi Note 14 Pro PlusRedmi Note 15Redmi Note 15 5GRedmi Note 15 ProRedmi Note 15 Pro 5GRedmi Note 15 Pro Plus 5GRedmi Note 8Redmi Note 8 ProRedmi Note 9Redmi Note 9 Pro
- Startseite
Bücher Englische Bücher Wissen & Bildung Naturwissenschaft, Medizin, Informatik, Technik Technik Elektronik, Elektro- und Nachrichtentechnik System Verilog Assertions and Functional Coverage
Derzeit nicht verfügbar
Handgeprüfte Gebrauchtware
Bis zu 50 % günstiger als neu
Der Umwelt zuliebe
System Verilog Assertions and Functional Coverage
Ashok B. Mehta (Gebundene Ausgabe, Englisch)
★★★★★
☆☆☆☆☆ Keine Bewertungen vorhanden
Optischer Zustand
Beschreibung
This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and Functional Coverage. Readers will benefit from the step-by-step approach to learning language and methodology nuances of both SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source of… the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question ‘have we functionally verified everything’. Written by a professional end-user of ASIC/SoC/CPU and FPGA design and Verification, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification and exhaustive coverage models for functional coverage, thereby drastically reducing their time to design, debug and cover. This updated third edition addresses the latest functional set released in IEEE-1800 (2012) LRM, including numerous additional operators and features. Additionally, many of the Concurrent Assertions/Operators explanations are enhanced, with the addition of more examples and figures. · Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; · Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage languages and methodologies; · Provides practical applications of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; · Explains each concept in a step-by-step fashion and applies it to a practical real life example; · Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book. Dieses Produkt haben wir gerade leider nicht auf Lager.
Handgeprüfte Gebrauchtware
Bis zu 50 % günstiger als neu
Der Umwelt zuliebe
Technische Daten
Erscheinungsdatum
18.10.2019
Sprache
Englisch
EAN
9783030247362
Herausgeber
Springer International Publishing
Sonderedition
Nein
Autor
Ashok B. Mehta
Seitenanzahl
507
Auflage
3rd edition 2020
Einbandart
Gebundene Ausgabe
Buch Untertitel
Guide to Language, Methodology and Applications
Schlagwörter
Assertion Based Verification, Design Debug, Functional Hardware verification, IEEE-1800 (2012) LRM, System-on-Chip Design, System-on-Chip Verification, SystemVerilog Assertions, SystemVerilog Functional Coverage, Testbench Development
Thema-Inhalt
TJFC - Schaltkreise und Komponenten (Bauteile)
TJF - Elektronik
UYF - Rechnerarchitektur und Logik-Entwurf
Höhe
235 mm
Breite
15.5 cm
Transparenz & Sicherheit
Hersteller: Springer, Europaplatz 3, Heidelberg, Deutschland, 69115, ProductSafety@springernature.com, Springer Nature Customer Service Center GmbH
-.-
★★★★★
☆☆☆☆☆ Leider noch keine Bewertungen
Leider noch keine Bewertungen
Sicher bei rebuy kaufen
Schreib die erste Bewertung für dieses Produkt!
Wenn du eine Bewertung für dieses Produkt schreibst, hilfst du allen Kund:innen, die noch überlegen, ob sie das Produkt kaufen wollen. Vielen Dank, dass du mitmachst!
Sicher bei rebuy kaufen