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Creating Assertion-Based IP
Harry D. Foster, Adam C. Krolnik (Broschiert, Englisch)
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Beschreibung
Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible… for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure. The guiding principles promoted in this book when creating an assertion-based IP monitor are: modularity—assertion-based IP should have a clear separation between detection and action clarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations) A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors’ experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers. From the Foreword: Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."Andrew Piziali, Sr. Design Verification EngineerCo-Author, ESL Design and Verification: A Prescription for Electronic System Level MethodologyAuthor, Functional Verification Coverage Measurement and Analysis 117,69 €
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Technische Daten
Erscheinungsdatum
19.11.2010
Sprache
Englisch
EAN
9781441942180
Herausgeber
Springer US
Serien- oder Bandtitel
Integrated Circuits and Systems
Sonderedition
Nein
Autor
Harry D. Foster, Adam C. Krolnik
Seitenanzahl
318
Auflage
1
Einbandart
Broschiert
Schlagwörter
Assertion-Based, Foster, Krolnik, SystemVerilog, Verification, Verilog, integrated circuits, optimization, simulation
Thema-Inhalt
TJFC - Schaltkreise und Komponenten (Bauteile)
UGC - Computer-Aided Design (CAD)
THR - Elektrotechnik
Höhe
235 mm
Breite
15.5 cm
Hersteller: Springer, Europaplatz 3, Heidelberg, Deutschland, 69115, ProductSafety@springernature.com, Springer Nature Customer Service Center GmbH
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